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TH-PHD-2020-004

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Developments for the FPGA-Based Digitiser in the PANDA Electromagnetic Calorimeters
Markus Preston
markus.preston@fysik.su.se
TH-PHD-2020-004.pdf (30.86 MB)
Thesis
Phd (PHD)
Detector hardware
Detector software
Friday, April 17, 2020 - 12:00
The strong interaction between quarks and gluons is one of the fundamental interactions described by the standard model of particle physics. Systems of quarks bound together by the strong interaction are known as hadrons, of which the proton and the neutron are the most common examples. The theoretical framework of quantum chromodynamics (QCD) is used to describe the strong interaction, but becomes increasingly difficult to use as the distance between the interacting particles increases. On the length scales relevant for hadrons, for instance, non-perturbative approaches to QCD have to be used. Experimental data are needed to verify these approaches. PANDA is one of the four experimental pillars of the upcoming FAIR facility in Darmstadt, Germany. In PANDA, an antiproton beam with a momentum between 1.5 and 15 GeV/c will interact in a hydrogen or nuclear target, allowing studies of various aspects of non-perturbative QCD. Motivated by the high interaction rates and the diverse physics goals of the experiment, a triggerless readout approach will be employed. In this approach, each detector subsystem will be equipped with intelligent front-end electronics that independently identify signals of interest in real time. In the electromagnetic calorimeter, FPGA-based digitiser modules will be used for this task. The high-radiation environment in PANDA will pose a challenge to these modules, due to both potential radiation damage and high signal rates from the calorimeter. In this thesis, these issues are addressed. First, the results from experimental measurements and Monte Carlo modelling of radiation-induced single event upsets in the FPGA are described. These studies have allowed predictions of the rate of single event upsets during operation of PANDA. Secondly, a newly developed algorithm for real-time processing of calorimeter signals in an FPGA at high pile-up rates is described. This algorithm provides a significant improvement in the time resolution of the calorimeter and allows reconstruction of the pulse height and timing of piled-up detector signals.
TH-PHD-2020-004: Developments for the FPGA-Based Digitiser in the PANDA Electro…

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